Verification Manager

Overview

In this role you will help shape the verification effort for a leading semiconductor at the Newbury site. You will blend technical hands-on work with people leadership, guiding verification strategy, project delivery, and process improvements. You’ll influence how the team operates, its culture, and its technical development while staying close to RTL/verification discussions. You will collaborate with engineering leadership to monitor progress and drive impactful verification outcomes.

Responsibilities

• Lead and balance technical verification work with people management for digital verification engineers
• Define and evolve verification strategies and methodologies
• Monitor project progress and identify process improvements
• Shape team structure, culture and technical development within the verification group
• Collaborate with engineering leadership and stakeholders on verification planning and delivery
• Mentor engineers across different experience levels and support career development

Key requirements

• Experience leading digital verification engineers
• Strong background in verification of complex ICs
• SystemVerilog and UVM experience with knowledge of assertions and coverage-driven verification
• Experience developing verification strategies and using metrics like code and functional coverage
• Ability to mentor and develop engineers across levels
• Strong debugging and problem-solving skills across RTL and verification environments
• Technical mindset with decision-making capabilities

• mentoring
• strong communication
• collaboration
• SystemVerilog
• UVM
• assertions

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