Fractile is seeking a highly experienced RTL Design Engineer to join our UK-based team in Tottenham. You will design and implement digital RTL for high-performance, power-efficient systems, driving RTL from concept to production while collaborating closely with verification and physical design teams.
The role requires 6+ years in digital/RTL design, strong knowledge of Verilog/VHDL, and a focus on timing, power gating and clock-domain crossing.
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