Senior Verification Engineer — Hybrid, Bonus + EMI Options

AccelerComm Ltd in Cambridge is seeking a Senior Verification Engineer to lead RTL verification of advanced wireless IP for ASIC and FPGA implementations. You will develop verification plans, build SystemVerilog/UVM environments and ensure coverage and quality before tape-out.

The role requires 3+ years in digital verification, strong SV/UVM, Linux scripting, and experience with coverage-driven methods. A hybrid work model in Cambridge is available with competitive compensation.

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