GPU Front-End Architect & RTL Optimizer

Apple Inc. in London is seeking an RTL engineer to work on PPA optimisation of the netlist for Apple Silicon GPUs. You will collaborate with RTL and Physical design teams to improve netlist quality milestones and push forward advanced GPU products.

The role requires a BSc in EE and experience with Verilog or SystemVerilog and scripting; knowledge of physical synthesis, timing analysis, and DFT is preferred. Apple values inclusive hiring and accessibility.

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