Power Management Design Verification Engineer (Early/Experienced)

Apple in Swindon is seeking a driven Design Verification Engineer to enable bug-free silicon for mixed-signal designs. You will develop verification plans, build test benches, and collaborate with Digital and Analog teams to ensure robust pre-silicon validation.

The role requires strong SystemVerilog and UVM skills, experience with constrained random environments, and a degree in CS or EE. Excellent communication and teamwork are essential to help Apple deliver high-quality products to customers

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