Senior CPU Engineer

Overview

In this Cambridge role you will help define and develop next-generation CPU technology, collaborating with architects to translate ideas into microarchitecture and RTL implementations. You will influence architecture and product direction early in the lifecycle, addressing performance, power and area targets. You work across microarchitecture, RTL, and verification to deliver on ambitious performance goals. This is a hands-on position in a highly experienced CPU team, offering exposure to cutting-edge processor design and cross-functional collaboration. You will shape impactful solutions for advanced computing applications, leveraging state-of-the-art techniques and tools.

Responsibilities

• Exploring high-performance CPU strategies with architecture and performance-modelling teams
• Developing and specifying microarchitecture from early exploration to detailed implementation
• Owning RTL development, assessment and refinement to meet power, performance, area and timing targets
• Collaborating with Design Verification engineers to support functional verification strategy
• Supporting performance verification and ensuring RTL meets performance targets
• Evaluating trade-offs across performance, power, and implementation complexity

Key requirements

• Strong understanding of microprocessor architecture
• Hands-on experience in at least one of: instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating-point execution, load/store execution, prefetching, cache and memory subsystems
• Experience with Verilog and/or VHDL
• Good understanding of logic design, timing and power implications
• Experience with low-power CPU microarchitecture techniques and high-performance design trade-offs
• Knowledge of simulation and waveform-debugging tools
• Experience scripting in Python or Perl

• Verilog
• VHDL
• logic design
• timing analysis
• power implications understanding
• simulation and waveform debugging tools

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