Overview
In this role you will support the physical layout of analog and mixed-signal high-speed ICs, translating schematics into quality layouts that meet electrical, matching, parasitic, reliability, and manufacturability requirements. You will join a small, high-performing team of analog IC design and layout experts and play a visible part in shaping products and technical direction within a growing semiconductor business. The role offers flexible/hybrid working with substantial remote work and a Southampton-based office option. This is an opportunity to contribute to AI hardware infrastructure at scale and have a tangible impact on product development.
Pay / Benefits
- competitive market salary
- great colleagues
- remote/hybrid (WFH)
- flexible working arrangements
- office in Southampton
- opportunity to influence product direction
Responsibilities
- Support physical layout of analog and mixed-signal high-speed ICs
- Translate schematics into layouts meeting electrical, matching, parasitic, reliability and manufacturability requirements
- Collaborate with a small, experienced team to influence technical direction and product outcomes
- Ensure layouts follow best practices for advanced semiconductor processes
- Contribute to parasitic extraction and verification processes
Key requirements
- Strong knowledge of analog and mixed-signal CMOS layout techniques, device matching, floorplanning, routing, DRC/LVS/debug, parasitic extraction
- Understanding of best layout practices for advanced semiconductor processes
- Experience with IC layout tools such as Cadence Virtuoso
- Experience running and debugging DRC/LVS using Calibre, Assura, Pegasus, or similar
- Desirable experience with blocks such as PLLs, ADCs, DACs, SerDes, bandgaps, regulators, amplifiers, oscillators, filters, or high-speed I/O
- Cadence Virtuoso
- DRC/LVS tooling (Calibre, Assura, Pegasus)
- Parasitic extraction
- CMOS analog and mixed-signal layout techniques
- Floorplanning and routing
- Device matching
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