Silicon Verification Engineer

Overview

In this role you will verify complex ASIC/processor designs and drive verification plans from architecture to implementation. You will work with cross-functional teams in a cutting-edge AI compute environment, shaping silicon behavior before tape-out. You’ll apply SystemVerilog/UVM and SVA, while building Python-based test automation to accelerate coverage. Bristol or Cambridge are the preferred locations, with a strong focus on ownership, collaboration and high-performance verification.

Pay / Benefits

• flexible working
• pension
• medical options
• income protection
• generous leave
• phantom equity

Responsibilities

• Verify complex ASIC/processor designs
• Develop verification plans and drive coverage to closure
• SystemVerilog/UVM verification
• SVA and assertion-based verification
• Debug across RTL, software and verification infrastructure
• Python automation and test generation
• Collaborate closely with architecture and design teams

Key requirements

• Strong ASIC, CPU, SoC or processor verification experience
• SystemVerilog and UVM
• Python
• Functional coverage and verification planning
• Strong RTL debugging skills
• Desirable: experience with SVA, assembly, compilers or complex processor environments

• collaboration with cross-functional teams
• analytical/problem-solving
• attention to detail
• SystemVerilog
• UVM
• SVA

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